diff src/main.c @ 43:6e7bfe83d2b0

Changed the design to vastly simplify the video hardware and support a 23-bit address space on the CPU
author Michael Pavone <pavone@retrodev.com>
date Sat, 27 Aug 2016 22:38:31 -0700
parents eda4919d955f
children
line wrap: on
line diff
--- a/src/main.c	Mon Apr 11 23:35:51 2016 -0700
+++ b/src/main.c	Sat Aug 27 22:38:31 2016 -0700
@@ -12,8 +12,8 @@
 #define CYCLES_PER_FRAME (832*262)
 #define MASTER_CLOCK 13056000
 
-uint8_t rom[48 * 1024];
-uint8_t ram[16 * 1024];
+uint8_t rom[4 * 1024 * 1024];
+uint8_t ram[128 * 1024];
 
 enum {
 	PORT_CONTROLLER_1,
@@ -28,10 +28,10 @@
 	PORT_VOLUME_CD,
 	PORT_TIMER,
 	PORT_SERIAL,
-	PORT_VERTICAL,
-	PORT_HORIZONTAL,
-	PORT_VRAM_ADDRESS,
-	PORT_VRAM_DATA
+	PORT_START_OFFSET,
+	PORT_VIDEO_MODE,
+	PORT_CRAM,
+	RESERVED_3
 };
 
 typedef struct {
@@ -52,55 +52,49 @@
 	return getchar();
 }
 
-void vertical_port_write(cpu *context, uint8_t port, uint16_t value)
+void offset_port_write(cpu *context, uint8_t port, uint16_t value)
 {
 	console *system = context->system;
 	vdp_run(&system->video, context->cycles);
-	system->video.vscroll = value;
+	system->video.start_offset = value;
 }
 
-uint16_t vertical_port_read(cpu *context, uint8_t port)
+uint16_t offset_port_read(cpu *context, uint8_t port)
 {
 	console *system = context->system;
 	vdp_run(&system->video, context->cycles);
 	return system->video.vcounter;
 }
 
-void horizontal_port_write(cpu *context, uint8_t port, uint16_t value)
+void mode_port_write(cpu *context, uint8_t port, uint16_t value)
 {
 	console *system = context->system;
 	vdp_run(&system->video, context->cycles);
-	vdp_write_hscroll(&system->video, value);
+	vdp_write_mode(&system->video, value);
+	context->mem_regions[2].base = vdp_get_back_buffer(&system->video);
 }
 
-uint16_t horizontal_port_read(cpu *context, uint8_t port)
+uint16_t mode_port_read(cpu *context, uint8_t port)
 {
 	console *system = context->system;
 	vdp_run(&system->video, context->cycles);
 	return system->video.hcounter;
 }
 
-void address_port_write(cpu *context, uint8_t port, uint16_t value)
+void cram_port_write(cpu *context, uint8_t port, uint16_t value)
 {
 	console *system = context->system;
 	vdp_run(&system->video, context->cycles);
-	vdp_write_address(&system->video, value);
+	vdp_write_cram(&system->video, value);
 }
 
-uint16_t address_port_read(cpu *context, uint8_t port)
+uint16_t cram_port_read(cpu *context, uint8_t port)
 {
 	console *system = context->system;
 	vdp_run(&system->video, context->cycles);
 	return system->video.status;
 }
 
-void data_port_write(cpu *context, uint8_t port, uint16_t value)
-{
-	console *system = context->system;
-	vdp_run(&system->video, context->cycles);
-	vdp_write_data(&system->video, value);
-}
-
 void frequency_port_write(cpu *context, uint8_t port, uint16_t value)
 {
 	console *system = context->system;
@@ -179,8 +173,9 @@
 }
 
 memory_region regions[] = {
-	{rom, 0, sizeof(rom)-1, MEM_READ},
-	{ram, sizeof(rom), sizeof(rom)-1+sizeof(ram), MEM_READ|MEM_WRITE},
+	{ .base = rom, .start = 0, .end = sizeof(rom)-1, .mask = 0x7FFFFF, .flags = MEM_READ },
+	{ .base = ram, .start = sizeof(rom), .end = 0x4FFFFF, .mask = 0xFFFF, .flags = MEM_READ|MEM_WRITE },
+	{ .base = NULL, .start = 0x700000, .end = 0x7FFFFF, .mask = 0xFFFF, .flags = MEM_READ|MEM_WRITE }
 };
 
 void run_console(console *context)
@@ -215,10 +210,12 @@
 	if ((read = fread(rom, 1, sizeof(rom), f)) < sizeof(rom))  {
 		memset(rom + read, 0xFF, sizeof(rom)-read);
 	}
+	fclose(f);
 	console context;
-	context.proc = alloc_cpu(10, sizeof(regions)/sizeof(memory_region), regions);
+	context.proc = alloc_cpu(2, sizeof(regions)/sizeof(memory_region), regions);
 	context.proc->system = &context;
 	vdp_init(&context.video, 2);
+	context.proc->mem_regions[2].base = vdp_get_back_buffer(&context.video);
 	timer_init(&context.timer, 16);
 	controller_init(&context.pads);
 	context.proc->port_handlers[PORT_CONTROLLER_1].read = controller_port_read;
@@ -232,13 +229,12 @@
 	context.proc->port_handlers[PORT_TIMER].write = timer_port_write;
 	context.proc->port_handlers[PORT_SERIAL].write = debug_port_write;
 	context.proc->port_handlers[PORT_SERIAL].read = debug_port_read;
-	context.proc->port_handlers[PORT_VERTICAL].write = vertical_port_write;
-	context.proc->port_handlers[PORT_VERTICAL].read = vertical_port_read;
-	context.proc->port_handlers[PORT_HORIZONTAL].write = horizontal_port_write;
-	context.proc->port_handlers[PORT_HORIZONTAL].read = horizontal_port_read;
-	context.proc->port_handlers[PORT_VRAM_ADDRESS].write = address_port_write;
-	context.proc->port_handlers[PORT_VRAM_ADDRESS].read = address_port_read;
-	context.proc->port_handlers[PORT_VRAM_DATA].write = data_port_write;
+	context.proc->port_handlers[PORT_START_OFFSET].write = offset_port_write;
+	context.proc->port_handlers[PORT_START_OFFSET].read = offset_port_read;
+	context.proc->port_handlers[PORT_VIDEO_MODE].write = mode_port_write;
+	context.proc->port_handlers[PORT_VIDEO_MODE].read = mode_port_read;
+	context.proc->port_handlers[PORT_CRAM].write = cram_port_write;
+	context.proc->port_handlers[PORT_CRAM].read = cram_port_read;
 	
 	if (!system_init(640, 480, 48000)) {
 		return 1;