Mercurial > repos > simple16

--- a/simple16.html	Tue Aug 30 21:27:33 2016 -0700
+++ b/simple16.html	Tue Aug 30 22:04:29 2016 -0700
@@ -10,9 +10,9 @@
 <body>
 	<h1>Simple 16</h1>
 	<p>
-	Simple 16 is a toy 16-bit video game console designed with simplicity of implementation in mind. While it is technically a 16-bit system,
-	it's capabilites are in many ways closer to an 8-bit system. Ultimately, the hope is that Simple 16 is simple enough to provide an easy
-	introduction for the novice emudev while still containing all the essential features of an older game console.
+	Simple 16 is a toy 16-bit video game console designed with simplicity of implementation in mind. The hope is that
+	Simple 16 is simple enough to provide an easy introduction for the novice emudev while still containing all the
+	essential features of an older game console and providing sufficient capabilities to support compelling games.

 	</p>
 	<h2>Table of Contents</h2>
@@ -48,14 +48,17 @@
 	<h3 id="cpuover">Overview</h3>
 	<p>
 		The Simple 16 CPU is a 16-bit RISC design. It has a main register file of 16 16-bit registers. Additionally, there are five special
-		purpose registers dedicated to exception processing. It has a flag 16-bit addres space. Instructions are a fixed size and are also 16-bits.
+		purpose registers dedicated to exception processing and an additional special register for holding the upper bits of the program counter.
+		It has a 23-bit addres space addressable with 16-bit offsets. Instructions are a fixed size and are also 16-bits.
 	</p>
 	<h3 id="cpuregs">Registers</h3>
 	<p>
-		The first 14 registers in the main file have no fixed function and are named r0 through r13. r14 serves as the program counter and
-		points to the next instruction to be fetched. More information about instruction fetch and execution can be found in
+		The first 12 registers in the main file have no fixed function and are named r0 through r11. r12 holds the upper 8-bits of the
+		upper and lower data segments and is also named db. r13 holds the stack pointer and is also named sp. r14 serves as the program
+		counter and points to the next instruction to be fetched. More information about instruction fetch and execution can be found in
 		<a href="#execution">Execution Details</a>. r15 serves as the status register. The status register contains bits corresponding
-		to the result of the last arithmetic instruction and the interrupt mask. The layout of the status register is given below.
+		to the result of the last arithmetic instruction and the interrupt mask. It also contains the uppper 7-bits of the stack segment.
+		The layout of the status register is given below.
 	</p>
 	<table>
 		<tr>
@@ -63,11 +66,16 @@
 			<th>Use</th>
 			<th>Notes</th>
 		<tr>
-			<td>15-5</td>
+			<td>15</td>
 			<td>Unused</td>
 			<td>Should be set to zero.</td>
 		</tr>
 		<tr>
+			<td>14-8</td>
+			<td>Stack Segment</td>
+			<td>Bits 8-14 of the 23-bit address for stack-relative load and stores</td>
+		</tr>
+		<tr>
 			<td>4</td>
 			<td>Negative Flag</td>
 			<td>Indicates the last result was negative.</td>
@@ -128,6 +136,10 @@
 		<li><a href="#cmpi">cmpi IM, rD</a></li>
 		<li><a href="#reti">reti rD</a></li>
 		<li><a href="#trapi">trapi IM</a></li>
+		<li><a href="#push">push rD</a></li>
+		<li><a href="#pop">pop rD</a></li>
+		<li><a href="#getepc">getpch rD</a></li>
+		<li><a href="#setepc">setpch rD</a></li>
 		<li><a href="#getepc">getepc rD</a></li>
 		<li><a href="#setepc">setepc rD</a></li>
 		<li><a href="#getesr">getesr rD</a></li>
@@ -787,19 +799,23 @@
 	<p>
 		<strong>Flags:</strong> Updated corresponding to the value in ESR.
 	</p>
-	<h4 id="trap">trap rD</h4>
-	<p>
-		Causes an exception to be taken to the vector indicated by rD.
-	</p>
-	<p>
-		<strong>Flags:</strong> Condition code flags unchanged, interrupt enable bits cleared.
-	</p>
 	<h4 id="trapi">trapi IM</h4>
 	<p>
 		Causes an exception to be taken to the vector indicated by IM
 	</p>
+	<h4 id="push">push rD</h4>
 	<p>
-		<strong>Flags:</strong> Condition code flags unchanged, interrupt enable bits cleared.
+		Pushes the value in register rD onto the stack.
+	</p>
+	<p>
+		<strong>Flags:</strong> Condition code flags unchanged.
+	</p>
+	<hr id="pop">pop rD</h4>
+	<p>
+		Pops a value of the stack and stores it in rD
+	</p>
+	<p>
+		<strong>Flags:</strong> Condition code flags unchanged.
 	</p>
 	<h4 id="getepc">getepc rD</h4>
 	<p>
@@ -874,9 +890,9 @@
 	<h2 id="video">Video</h2>
 	<h3 id="vidover">Overview</h3>
 	<p>
-		Simple 16 features a tile-based video processor using 8x8 pixel tiles. It supports a single background plane with a fixed width of 64 tiles and configurable height.
-		64 sprites can be displayed simultaneously and 20 can be displayed on each line. Each sprite can either be 8x8 or 16x16 pixels and can use either of the first two
-		16 color palettes. The background plane can make use of all 4 palettes.
+		Simple 16 features a simple linear framebuffer using indexed color. There is 128KB of VRAM arranged as two 64KB framebuffers. At any given time one buffer is used for
+		display and the other is accessible to the CPU. Both 4bpp and 8bpp depths are available. The resolution of the display is fixed at 320x240, but up to 31 lines can be
+		blanked at the top and bottom of the display to save on VRAM usage or to implement a letterbox effect.
 	</p>
 	<h2 id="audio">Audio</h2>
 	<h3 id="audover">Overview</h3>